busdma and I/O MMU
We generally don’t use the I/O MMU on chipsets that have them. The exception is on sparc64. The I/O MMU allows us more freedom in allocating memory for DMA operations by programming the I/O MMU in such a way that the (possibly scattered fragments) appear as a contiguous block of memory that is within reach of the device that does the DMA. It seems to me that the function of the I/O MMU can be abstracted and handled by a KOBJ interface. This would allow a generic and/or machine independent busdma implementation while still being able to make use of machine dependent hardware and when no such hardware (i.e. the I/O MMU) is present or supported to fall back to bounce buffers and/or the use of contigmalloc(). Detection of I/O MMUs would happen at bus enumeration time and may in fact happen after the detection of a device that uses busdma. This may not yield the desired behaviour. Multi-pass bus enumeration may help us here and seems to be mentioned in other contexts too as a way of resolving problems. The question is whether we can get rid of the almost identical implementations of busdma that we have for the platforms that we support when we use such a KOBJ interface?
January 25th, 2008 at 7:43 am
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